Recently, CMOS image sensors have been attracting attention as solid-stage imaging devices (image sensors) for CCDs.
This is because CMOS image sensors are able to overcome the following problems.
Namely, dedicated processes are required for the manufacture of CCD pictures elements, an operation of CCD picture elements requires a plurality of power supply voltages, and a plurality of peripheral ICs must be operated in combination.
Such CCDs involve various problems such as making a system very complicated, which can be solved by CMOS image sensors.
For the manufacture of CMOS image sensors, the same manufacturing processes as those used for general-purpose CMOS integrated circuits may be used. It is also practical to install, on a same chip, an analog circuit and a logic circuit that can be driven by a single power supply and are based on the CMOS process.
For the above-mentioned reasons, the CMOS image sensor provides a plurality of great merits, such as the reduced number of peripheral ICs.
An output circuit of the CCD is mainly one-channel (ch) output that uses an FD amplifier having an FD (Floating Diffusion).
In contrast, the CMOS image sensor has an FD amplifier for each picture element and the output thereof is mainly a column parallel output type in which a certain row in a picture array is selected and the selected row is simultaneously read in the column direction.
This is because it is difficult to get sufficient drive capabilities with the FD amplifier arranged in a picture element and, therefore, it is necessary to lower data rate, for which parallel processing is considered advantageous.
And, with CMOS image sensors, resetting picture elements in general is executed often by a method in which picture elements are sequentially reset for each row.
This method is referred to as a rolling shutter.
FIG. 1 shows a diagram illustrating an example of an CMOS image sensor configured by four transistors.
This picture element 1 has a photoelectric conversion element 11 based on a photo diode, for example, and, for this one photoelectric conversion element 11, has four transistors of a transfer transistor 12, a reset transistor 13, an amplification transistor 14, and a selection transistor 15 as active elements.
The photoelectric conversion element 11 photoelectrically converts an incident light into a charge (here, the electron) having an amount corresponding to the amount of the incident light.
The transfer transistor 12 is connected between the photoelectric conversion element 11 and a floating diffusion FD and a transmission signal (a drive signal) TG is given to its gate (transfer gate) through a transfer control line LTx.
Consequently, the electron obtained by the photoelectric conversion by the photoelectric conversion element 11 are transferred to the floating diffusion FD.
The reset transistor 13 is connected between a power supply line LVDD and the floating diffusion FD and a rest signal RST is given to its gate through a reset control line LRST.
Consequently, a potential of the floating diffusion FD is reset to a potential of the power supply line LDVV.
The floating diffusion FD is connected with the gate of the amplification transistor 14. The amplification transistor 14 is connected to a signal line 16 via the selection transistor 15 to configure a constant current source and a source follower outside the picture element.
Then, an address signal (a selection signal) SEL is given to the gate of the selection transistor 15 through a selection control line LSEL, thereby turning on the selection transistor 15.
When the selection transistor 15 is turned on, the amplification transistor 14 amplifies the potential of the floating diffusion FD and outputs a voltage corresponding to the potential to the signal line 16. Through the signal line 16, voltage outputted from each picture element is outputted to a column circuit (a column processing circuit).
This picture element reset operation denotes that the charge accumulated in the photoelectric conversion element 11 is transferred to the floating diffusion FD for discharge by turning on the transfer transistor 12.
At this moment, the floating diffusion FD has discharged the charge on the power supply side in advance by turning on the reset transistor 13, thereby making ready for receive the charge of the photoelectric conversion element 11. Alternatively, the charge may be discharged directly to the power supply, while the transfer transistor 12 is on by concurrently turning on the reset transistor 13.
The sequence of these operations is simply referred to as “a picture element reset operation” or “a shutter operation.”
On the other hand, in a read operation, the reset transistor 13 is first turned on to reset the floating diffusion FD and an excess charge (noise) is outputted to the signal line 16 through the selection transistor 15 turned on in that state. This is referred to as a P-phase output.
Next, the transfer transistor 12 is turned on to transfer a charge accumulated in the photoelectric conversion element 11 to the floating diffusion FD and its output is outputted to the signal line 16. This is referred to as a D-phase output.
Outside the picture element circuit, a difference between the D-phase output and the P-phase output is obtained and the reset noise of the floating diffusion FD is canceled, thereby providing an image signal.
For simplicity, the sequence of the these operations is simply referred to as “a picture element read operation.”
FIG. 2 is a diagram illustrating a general configuration example of a CMOS image sensor (a solid-state imaging device) with the picture element shown in FIG. 1 arranged in a two-dimensional array.
A CMOS image sensor 20 shown in FIG. 2 is configured by a picture element array block 21 in which the picture element circuit shown in FIG. 1 is arranged in a two-dimensional array, a picture element drive circuit (a vertical scan circuit) 22, and a column circuit (a column processing circuit) 23.
The picture element drive circuit 22 controls on/off of the transfer transistor 12, the reset transistor 13, and the selection transistor 15 of the picture elements of each row.
The column circuit 23 is a circuit that receives data of the picture element row read by the picture element drive circuit 22 and transfers the data to a signal processing circuit of a subsequent stage.
FIG. 3 is a diagram illustrating a timing chart of a rolling shutter operation of the circuit shown in FIG. 2.
As shown in FIG. 3, a picture element reset operation is row-sequentially executed and, by following this operation, a picture element read operation is row-sequentially executed.
The picture elements of each row accumulate each a signal in the photoelectric conversion element during a picture element reset operation and a picture element read operation, the signal being read by the picture element read operation.
Meanwhile, when a backlit scene or a scene having a great luminance difference of contrast is taken, a camera having a imaging device as described above causes white-out or black-out with a standard image with exposure time matched with the luminance of a subject.
So, dynamic range expansion is executed by taking a plurality of non-standard images having different exposure times and replacing areas too bright or dark in a standard image by an image obtained by applying a synthetic gain to the non-standard images, thereby executing compression in accordance with output bits.
For example, in the processing called wide dynamic range (WD), images having wide dynamic ranges (DR) are obtained by multiple exposures and the synthesis of plural images and the compression of dynamic ranges (DR) are executed.